I have the following usecase and working with a SAME70 device:
I like to send data to two equal I2C slaves from my SAME70 on a custom board. This should last till infinity after start of my software. The data needs to be send to different internal addresses of I2C devices. Therefore I thought about setting up a linked list that is sending the data but also changing the IADR register accordingly. The linked list is doing the setup of the I2C slaves and then start to point to itself when it reachs the point of continous data transmission to the I2C slaves. The linked list consists of overall 14 view2 and 3 view2 descriptors.
My problem is that I need a mechanism that allows me to control the execution of each descriptor because XDMAC is finishing a single descriptor before the data is really transmitted to the I2C slaves completely. So I have to wait until the I2C data is transmitted before executing the next descriptor of my linked-list.
I tried to use the SWREQ bit for the XDMAC channel. But that doesn't seem to work together with peripherals (although in my opinion it is described in the user manual of the SAME70). Certainly I already (successfully) implemented the procedure of sending the last data outside the XDMAC transfer to be able to set the I2C STOP condition properly. However, the next descriptor is already executed while I still handle the last data transmission of the previous one.
Any ideas how to control the execution of of descriptors in a XDMAC linked list?