Hello,
I am trying to build bare metal project for SAM4s. When i try to disassemble with arm-none-eabi-objdump it does not contain functions i used.
Here is the output of /usr/bin/arm-none-eabi-objdump -d proba.elf > proba.lst
proba.elf: file format elf32-littlearm
Disassembly of section .text:
00400000 <deregister_tm_clones>:
400000: 4b04 ldr r3, [pc, #16] ; (400014 <deregister_tm_clones+0x14>)
400002: 4805 ldr r0, [pc, #20] ; (400018 <deregister_tm_clones+0x18>)
400004: 1a1b subs r3, r3, r0
400006: 2b06 cmp r3, #6
400008: d902 bls.n 400010 <deregister_tm_clones+0x10>
40000a: 4b04 ldr r3, [pc, #16] ; (40001c <deregister_tm_clones+0x1c>)
40000c: b103 cbz r3, 400010 <deregister_tm_clones+0x10>
40000e: 4718 bx r3
400010: 4770 bx lr
400012: bf00 nop
400014: 004001cb .word 0x004001cb
400018: 004001c8 .word 0x004001c8
40001c: 00000000 .word 0x00000000
00400020 <register_tm_clones>:
400020: 4905 ldr r1, [pc, #20] ; (400038 <register_tm_clones+0x18>)
400022: 4806 ldr r0, [pc, #24] ; (40003c <register_tm_clones+0x1c>)
400024: 1a09 subs r1, r1, r0
400026: 1089 asrs r1, r1, #2
400028: eb01 71d1 add.w r1, r1, r1, lsr #31
40002c: 1049 asrs r1, r1, #1
40002e: d002 beq.n 400036 <register_tm_clones+0x16>
400030: 4b03 ldr r3, [pc, #12] ; (400040 <register_tm_clones+0x20>)
400032: b103 cbz r3, 400036 <register_tm_clones+0x16>
400034: 4718 bx r3
400036: 4770 bx lr
400038: 004001c8 .word 0x004001c8
40003c: 004001c8 .word 0x004001c8
400040: 00000000 .word 0x00000000
00400044 <__do_global_dtors_aux>:
400044: b510 push {r4, lr}
400046: 4c06 ldr r4, [pc, #24] ; (400060 <__do_global_dtors_aux+0x1c>)
400048: 7823 ldrb r3, [r4, #0]
40004a: b943 cbnz r3, 40005e <__do_global_dtors_aux+0x1a>
40004c: f7ff ffd8 bl 400000 <deregister_tm_clones>
400050: 4b04 ldr r3, [pc, #16] ; (400064 <__do_global_dtors_aux+0x20>)
400052: b113 cbz r3, 40005a <__do_global_dtors_aux+0x16>
400054: 4804 ldr r0, [pc, #16] ; (400068 <__do_global_dtors_aux+0x24>)
400056: f3af 8000 nop.w
40005a: 2301 movs r3, #1
40005c: 7023 strb r3, [r4, #0]
40005e: bd10 pop {r4, pc}
400060: 20000428 .word 0x20000428
400064: 00000000 .word 0x00000000
400068: 004001c8 .word 0x004001c8
0040006c <frame_dummy>:
40006c: b508 push {r3, lr}
40006e: 4b08 ldr r3, [pc, #32] ; (400090 <frame_dummy+0x24>)
400070: b11b cbz r3, 40007a <frame_dummy+0xe>
400072: 4808 ldr r0, [pc, #32] ; (400094 <frame_dummy+0x28>)
400074: 4908 ldr r1, [pc, #32] ; (400098 <frame_dummy+0x2c>)
400076: f3af 8000 nop.w
40007a: 4808 ldr r0, [pc, #32] ; (40009c <frame_dummy+0x30>)
40007c: 6803 ldr r3, [r0, #0]
40007e: b913 cbnz r3, 400086 <frame_dummy+0x1a>
400080: e8bd 4008 ldmia.w sp!, {r3, lr}
400084: e7cc b.n 400020 <register_tm_clones>
400086: 4b06 ldr r3, [pc, #24] ; (4000a0 <frame_dummy+0x34>)
400088: 2b00 cmp r3, #0
40008a: d0f9 beq.n 400080 <frame_dummy+0x14>
40008c: 4798 blx r3
40008e: e7f7 b.n 400080 <frame_dummy+0x14>
400090: 00000000 .word 0x00000000
400094: 004001c8 .word 0x004001c8
400098: 2000042c .word 0x2000042c
40009c: 004001c8 .word 0x004001c8
4000a0: 00000000 .word 0x00000000
004000a4 <atexit>:
4000a4: 4601 mov r1, r0
4000a6: 2000 movs r0, #0
4000a8: 4602 mov r2, r0
4000aa: 4603 mov r3, r0
4000ac: f000 b818 b.w 4000e0 <__register_exitproc>
004000b0 <__libc_fini_array>:
4000b0: b538 push {r3, r4, r5, lr}
4000b2: 4d09 ldr r5, [pc, #36] ; (4000d8 <__libc_fini_array+0x28>)
4000b4: 4c09 ldr r4, [pc, #36] ; (4000dc <__libc_fini_array+0x2c>)
4000b6: 1b64 subs r4, r4, r5
4000b8: 10a4 asrs r4, r4, #2
4000ba: bf18 it ne
4000bc: eb05 0584 addne.w r5, r5, r4, lsl #2
4000c0: d005 beq.n 4000ce <__libc_fini_array+0x1e>
4000c2: 3c01 subs r4, #1
4000c4: f855 3d04 ldr.w r3, [r5, #-4]!
4000c8: 4798 blx r3
4000ca: 2c00 cmp r4, #0
4000cc: d1f9 bne.n 4000c2 <__libc_fini_array+0x12>
4000ce: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
4000d2: f000 b871 b.w 4001b8 <_fini>
4000d6: bf00 nop
4000d8: 004001c4 .word 0x004001c4
4000dc: 004001c8 .word 0x004001c8
004000e0 <__register_exitproc>:
4000e0: b5f0 push {r4, r5, r6, r7, lr}
4000e2: 4c27 ldr r4, [pc, #156] ; (400180 <__register_exitproc+0xa0>)
4000e4: 6826 ldr r6, [r4, #0]
4000e6: f8d6 4148 ldr.w r4, [r6, #328] ; 0x148
4000ea: b085 sub sp, #20
4000ec: 4607 mov r7, r0
4000ee: 2c00 cmp r4, #0
4000f0: d041 beq.n 400176 <__register_exitproc+0x96>
4000f2: 6865 ldr r5, [r4, #4]
4000f4: 2d1f cmp r5, #31
4000f6: dd1e ble.n 400136 <__register_exitproc+0x56>
4000f8: 4822 ldr r0, [pc, #136] ; (400184 <__register_exitproc+0xa4>)
4000fa: b918 cbnz r0, 400104 <__register_exitproc+0x24>
4000fc: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
400100: b005 add sp, #20
400102: bdf0 pop {r4, r5, r6, r7, pc}
400104: f44f 70c8 mov.w r0, #400 ; 0x190
400108: 9103 str r1, [sp, #12]
40010a: 9202 str r2, [sp, #8]
40010c: 9301 str r3, [sp, #4]
40010e: f3af 8000 nop.w
400112: 9903 ldr r1, [sp, #12]
400114: 9a02 ldr r2, [sp, #8]
400116: 9b01 ldr r3, [sp, #4]
400118: 4604 mov r4, r0
40011a: 2800 cmp r0, #0
40011c: d0ee beq.n 4000fc <__register_exitproc+0x1c>
40011e: f8d6 5148 ldr.w r5, [r6, #328] ; 0x148
400122: 6025 str r5, [r4, #0]
400124: 2000 movs r0, #0
400126: 6060 str r0, [r4, #4]
400128: 4605 mov r5, r0
40012a: f8c6 4148 str.w r4, [r6, #328] ; 0x148
40012e: f8c4 0188 str.w r0, [r4, #392] ; 0x188
400132: f8c4 018c str.w r0, [r4, #396] ; 0x18c
400136: b93f cbnz r7, 400148 <__register_exitproc+0x68>
400138: 1cab adds r3, r5, #2
40013a: 2000 movs r0, #0
40013c: 3501 adds r5, #1
40013e: 6065 str r5, [r4, #4]
400140: f844 1023 str.w r1, [r4, r3, lsl #2]
400144: b005 add sp, #20
400146: bdf0 pop {r4, r5, r6, r7, pc}
400148: eb04 0085 add.w r0, r4, r5, lsl #2
40014c: f04f 0c01 mov.w ip, #1
400150: f8c0 2088 str.w r2, [r0, #136] ; 0x88
400154: f8d4 6188 ldr.w r6, [r4, #392] ; 0x188
400158: fa0c f205 lsl.w r2, ip, r5
40015c: 4316 orrs r6, r2
40015e: 2f02 cmp r7, #2
400160: f8c4 6188 str.w r6, [r4, #392] ; 0x188
400164: f8c0 3108 str.w r3, [r0, #264] ; 0x108
400168: d1e6 bne.n 400138 <__register_exitproc+0x58>
40016a: f8d4 318c ldr.w r3, [r4, #396] ; 0x18c
40016e: 431a orrs r2, r3
400170: f8c4 218c str.w r2, [r4, #396] ; 0x18c
400174: e7e0 b.n 400138 <__register_exitproc+0x58>
400176: f506 74a6 add.w r4, r6, #332 ; 0x14c
40017a: f8c6 4148 str.w r4, [r6, #328] ; 0x148
40017e: e7b8 b.n 4000f2 <__register_exitproc+0x12>
400180: 004001a0 .word 0x004001a0
400184: 00000000 .word 0x00000000
00400188 <register_fini>:
400188: 4b02 ldr r3, [pc, #8] ; (400194 <register_fini+0xc>)
40018a: b113 cbz r3, 400192 <register_fini+0xa>
40018c: 4802 ldr r0, [pc, #8] ; (400198 <register_fini+0x10>)
40018e: f7ff bf89 b.w 4000a4 <atexit>
400192: 4770 bx lr
400194: 00000000 .word 0x00000000
400198: 004000b1 .word 0x004000b1
40019c: 00000043 .word 0x00000043
004001a0 <_global_impure_ptr>:
4001a0: 20000000 ...
004001a4 <_init>:
4001a4: b5f8 push {r3, r4, r5, r6, r7, lr}
4001a6: bf00 nop
4001a8: bcf8 pop {r3, r4, r5, r6, r7}
4001aa: bc08 pop {r3}
4001ac: 469e mov lr, r3
4001ae: 4770 bx lr
004001b0 <__init_array_start>:
4001b0: 00400189 .word 0x00400189
004001b4 <__frame_dummy_init_array_entry>:
4001b4: 0040006d m.@.
004001b8 <_fini>:
4001b8: b5f8 push {r3, r4, r5, r6, r7, lr}
4001ba: bf00 nop
4001bc: bcf8 pop {r3, r4, r5, r6, r7}
4001be: bc08 pop {r3}
4001c0: 469e mov lr, r3
4001c2: 4770 bx lr
004001c4 <__fini_array_start>:
4001c4: 00400045 .word 0x00400045
If i call /usr/bin/arm-none-eabi-objdump -d system_sam4s.o main.o proba.o system_sam4s.o > proba.lst
it disassembles functions which i need but it is final assembly code
system_sam4s.o: file format elf32-littlearm
Disassembly of section .text.SystemInit:
00000000 <SystemInit>:
0: 2300 movs r3, #0
2: f383 8814 msr CONTROL, r3
6: 4916 ldr r1, [pc, #88] ; (60 <SystemInit+0x60>)
8: 4b16 ldr r3, [pc, #88] ; (64 <SystemInit+0x64>)
a: 4817 ldr r0, [pc, #92] ; (68 <SystemInit+0x68>)
c: 4a17 ldr r2, [pc, #92] ; (6c <SystemInit+0x6c>)
e: 6008 str r0, [r1, #0]
10: 4619 mov r1, r3
12: 621a str r2, [r3, #32]
14: 6e8a ldr r2, [r1, #104] ; 0x68
16: 4b13 ldr r3, [pc, #76] ; (64 <SystemInit+0x64>)
18: 07d2 lsls r2, r2, #31
1a: d5fb bpl.n 14 <SystemInit+0x14>
1c: 4a14 ldr r2, [pc, #80] ; (70 <SystemInit+0x70>)
1e: 621a str r2, [r3, #32]
20: 461a mov r2, r3
22: 6e91 ldr r1, [r2, #104] ; 0x68
24: 4b0f ldr r3, [pc, #60] ; (64 <SystemInit+0x64>)
26: 03c8 lsls r0, r1, #15
28: d5fb bpl.n 22 <SystemInit+0x22>
2a: 4a12 ldr r2, [pc, #72] ; (74 <SystemInit+0x74>)
2c: 629a str r2, [r3, #40] ; 0x28
2e: 461a mov r2, r3
30: 6e91 ldr r1, [r2, #104] ; 0x68
32: 4b0c ldr r3, [pc, #48] ; (64 <SystemInit+0x64>)
34: 0789 lsls r1, r1, #30
36: d5fb bpl.n 30 <SystemInit+0x30>
38: 2202 movs r2, #2
3a: 631a str r2, [r3, #48] ; 0x30
3c: 6e9a ldr r2, [r3, #104] ; 0x68
3e: 4909 ldr r1, [pc, #36] ; (64 <SystemInit+0x64>)
40: 0712 lsls r2, r2, #28
42: d5fb bpl.n 3c <SystemInit+0x3c>
44: f44f 7000 mov.w r0, #512 ; 0x200
48: f06f 02ff mvn.w r2, #255 ; 0xff
4c: 2307 movs r3, #7
4e: 6008 str r0, [r1, #0]
50: 610a str r2, [r1, #16]
52: f8c1 3100 str.w r3, [r1, #256] ; 0x100
56: b662 cpsie i
58: 4b07 ldr r3, [pc, #28] ; (78 <SystemInit+0x78>)
5a: 4a08 ldr r2, [pc, #32] ; (7c <SystemInit+0x7c>)
5c: 601a str r2, [r3, #0]
5e: 4770 bx lr
60: 400e0a00 .word 0x400e0a00
64: 400e0400 .word 0x400e0400
68: 04000500 .word 0x04000500
6c: 0037ff09 .word 0x0037ff09
70: 0137ff09 .word 0x0137ff09
74: 20093f01 .word 0x20093f01
78: 00000000 .word 0x00000000
7c: 00b71b00 .word 0x00b71b00
Disassembly of section .text.SystemCoreClockUpdate:
00000000 <SystemCoreClockUpdate>:
0: 4834 ldr r0, [pc, #208] ; (d4 <SystemCoreClockUpdate+0xd4>)
2: 6b03 ldr r3, [r0, #48] ; 0x30
4: f003 0303 and.w r3, r3, #3
8: 2b01 cmp r3, #1
a: b410 push {r4}
c: d03e beq.n 8c <SystemCoreClockUpdate+0x8c>
e: d325 bcc.n 5c <SystemCoreClockUpdate+0x5c>
10: 6a03 ldr r3, [r0, #32]
12: 01d9 lsls r1, r3, #7
14: d54a bpl.n ac <SystemCoreClockUpdate+0xac>
16: 4930 ldr r1, [pc, #192] ; (d8 <SystemCoreClockUpdate+0xd8>)
18: 4a30 ldr r2, [pc, #192] ; (dc <SystemCoreClockUpdate+0xdc>)
1a: 600a str r2, [r1, #0]
1c: 482d ldr r0, [pc, #180] ; (d4 <SystemCoreClockUpdate+0xd4>)
1e: 6b03 ldr r3, [r0, #48] ; 0x30
20: f003 0303 and.w r3, r3, #3
24: 2b02 cmp r3, #2
26: bf0b itete eq
28: 6a84 ldreq r4, [r0, #40] ; 0x28
2a: 6ac4 ldrne r4, [r0, #44] ; 0x2c
2c: 6a83 ldreq r3, [r0, #40] ; 0x28
2e: 6ac3 ldrne r3, [r0, #44] ; 0x2c
30: f3c4 400a ubfx r0, r4, #16, #11
34: fb00 2202 mla r2, r0, r2, r2
38: 4826 ldr r0, [pc, #152] ; (d4 <SystemCoreClockUpdate+0xd4>)
3a: b2db uxtb r3, r3
3c: fbb2 f3f3 udiv r3, r2, r3
40: 600b str r3, [r1, #0]
42: 6b02 ldr r2, [r0, #48] ; 0x30
44: f002 0270 and.w r2, r2, #112 ; 0x70
48: 2a70 cmp r2, #112 ; 0x70
4a: d117 bne.n 7c <SystemCoreClockUpdate+0x7c>
4c: 4a24 ldr r2, [pc, #144] ; (e0 <SystemCoreClockUpdate+0xe0>)
4e: f85d 4b04 ldr.w r4, , #4
52: fba2 2303 umull r2, r3, r2, r3
56: 085b lsrs r3, r3, #1
58: 600b str r3, [r1, #0]
5a: 4770 bx lr
5c: 4b21 ldr r3, [pc, #132] ; (e4 <SystemCoreClockUpdate+0xe4>)
5e: 491e ldr r1, [pc, #120] ; (d8 <SystemCoreClockUpdate+0xd8>)
60: 695b ldr r3, [r3, #20]
62: 061a lsls r2, r3, #24
64: bf4c ite mi
66: f44f 4300 movmi.w r3, #32768 ; 0x8000
6a: f44f 43fa movpl.w r3, #32000 ; 0x7d00
6e: 600b str r3, [r1, #0]
70: 4818 ldr r0, [pc, #96] ; (d4 <SystemCoreClockUpdate+0xd4>)
72: 6b02 ldr r2, [r0, #48] ; 0x30
74: f002 0270 and.w r2, r2, #112 ; 0x70
78: 2a70 cmp r2, #112 ; 0x70
7a: d0e7 beq.n 4c <SystemCoreClockUpdate+0x4c>
7c: 6b02 ldr r2, [r0, #48] ; 0x30
7e: f85d 4b04 ldr.w r4, , #4
82: f3c2 1202 ubfx r2, r2, #4, #3
86: 40d3 lsrs r3, r2
88: 600b str r3, [r1, #0]
8a: 4770 bx lr
8c: 6a03 ldr r3, [r0, #32]
8e: 4912 ldr r1, [pc, #72] ; (d8 <SystemCoreClockUpdate+0xd8>)
90: 01db lsls r3, r3, #7
92: d408 bmi.n a6 <SystemCoreClockUpdate+0xa6>
94: 4b14 ldr r3, [pc, #80] ; (e8 <SystemCoreClockUpdate+0xe8>)
96: 600b str r3, [r1, #0]
98: 6a02 ldr r2, [r0, #32]
9a: f002 0270 and.w r2, r2, #112 ; 0x70
9e: 2a10 cmp r2, #16
a0: d014 beq.n cc <SystemCoreClockUpdate+0xcc>
a2: 2a20 cmp r2, #32
a4: d1e4 bne.n 70 <SystemCoreClockUpdate+0x70>
a6: 4b0d ldr r3, [pc, #52] ; (dc <SystemCoreClockUpdate+0xdc>)
a8: 600b str r3, [r1, #0]
aa: e7e1 b.n 70 <SystemCoreClockUpdate+0x70>
ac: 490a ldr r1, [pc, #40] ; (d8 <SystemCoreClockUpdate+0xd8>)
ae: 4a0e ldr r2, [pc, #56] ; (e8 <SystemCoreClockUpdate+0xe8>)
b0: 600a str r2, [r1, #0]
b2: 6a03 ldr r3, [r0, #32]
b4: f003 0370 and.w r3, r3, #112 ; 0x70
b8: 2b10 cmp r3, #16
ba: d004 beq.n c6 <SystemCoreClockUpdate+0xc6>
bc: 2b20 cmp r3, #32
be: d1ad bne.n 1c <SystemCoreClockUpdate+0x1c>
c0: 4a06 ldr r2, [pc, #24] ; (dc <SystemCoreClockUpdate+0xdc>)
c2: 600a str r2, [r1, #0]
c4: e7aa b.n 1c <SystemCoreClockUpdate+0x1c>
c6: 4a09 ldr r2, [pc, #36] ; (ec <SystemCoreClockUpdate+0xec>)
c8: 600a str r2, [r1, #0]
ca: e7a7 b.n 1c <SystemCoreClockUpdate+0x1c>
cc: 4b07 ldr r3, [pc, #28] ; (ec <SystemCoreClockUpdate+0xec>)
ce: 600b str r3, [r1, #0]
d0: e7ce b.n 70 <SystemCoreClockUpdate+0x70>
d2: bf00 nop
d4: 400e0400 .word 0x400e0400
d8: 00000000 .word 0x00000000
dc: 00b71b00 .word 0x00b71b00
e0: aaaaaaab .word 0xaaaaaaab
e4: 400e1410 .word 0x400e1410
e8: 003d0900 .word 0x003d0900
ec: 007a1200 .word 0x007a1200
Disassembly of section .text.system_init_flash:
00000000 <system_init_flash>:
0: 4b0f ldr r3, [pc, #60] ; (40 <system_init_flash+0x40>)
2: 4298 cmp r0, r3
4: d912 bls.n 2c <system_init_flash+0x2c>
6: 4b0f ldr r3, [pc, #60] ; (44 <system_init_flash+0x44>)
8: 4298 cmp r0, r3
a: d90b bls.n 24 <system_init_flash+0x24>
c: 4b0e ldr r3, [pc, #56] ; (48 <system_init_flash+0x48>)
e: 4298 cmp r0, r3
10: d911 bls.n 36 <system_init_flash+0x36>
12: 4b0e ldr r3, [pc, #56] ; (4c <system_init_flash+0x4c>)
14: 4298 cmp r0, r3
16: 4b0e ldr r3, [pc, #56] ; (50 <system_init_flash+0x50>)
18: bf8c ite hi
1a: 4a0e ldrhi r2, [pc, #56] ; (54 <system_init_flash+0x54>)
1c: f04f 2204 movls.w r2, #67109888 ; 0x4000400
20: 601a str r2, [r3, #0]
22: 4770 bx lr
24: 4b0a ldr r3, [pc, #40] ; (50 <system_init_flash+0x50>)
26: 4a0c ldr r2, [pc, #48] ; (58 <system_init_flash+0x58>)
28: 601a str r2, [r3, #0]
2a: 4770 bx lr
2c: 4b08 ldr r3, [pc, #32] ; (50 <system_init_flash+0x50>)
2e: f04f 6280 mov.w r2, #67108864 ; 0x4000000
32: 601a str r2, [r3, #0]
34: 4770 bx lr
36: 4b06 ldr r3, [pc, #24] ; (50 <system_init_flash+0x50>)
38: 4a08 ldr r2, [pc, #32] ; (5c <system_init_flash+0x5c>)
3a: 601a str r2, [r3, #0]
3c: 4770 bx lr
3e: bf00 nop
40: 01ba813f .word 0x01ba813f
44: 0375027f .word 0x0375027f
48: 053ec5ff .word 0x053ec5ff
4c: 07270dff .word 0x07270dff
50: 400e0a00 .word 0x400e0a00
54: 04000500 .word 0x04000500
58: 04000100 .word 0x04000100
5c: 04000200 .word 0x04000200
main.o: file format elf32-littlearm
Disassembly of section .text.startup.main:
00000000 <main>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <SystemInit>
6: 4802 ldr r0, [pc, #8] ; (c <printf+0xc>)
8: f7ff fffe bl 0 <printf>
c: e7fb b.n 6 <main+0x6>
e: bf00 nop
10: 00000000 .word 0x00000000
Disassembly of section .text.proba:
00000000 <proba>:
0: b508 push {r3, lr}
2: 4802 ldr r0, [pc, #8] ; (c <proba+0xc>)
4: f7ff fffe bl 0 <printf>
8: 2005 movs r0, #5
a: bd08 pop {r3, pc}
c: 00000000 .word 0x00000000
proba.o: file format elf32-littlearm
system_sam4s.o: file format elf32-littlearm
Disassembly of section .text.SystemInit:
00000000 <SystemInit>:
0: 2300 movs r3, #0
2: f383 8814 msr CONTROL, r3
6: 4916 ldr r1, [pc, #88] ; (60 <SystemInit+0x60>)
8: 4b16 ldr r3, [pc, #88] ; (64 <SystemInit+0x64>)
a: 4817 ldr r0, [pc, #92] ; (68 <SystemInit+0x68>)
c: 4a17 ldr r2, [pc, #92] ; (6c <SystemInit+0x6c>)
e: 6008 str r0, [r1, #0]
10: 4619 mov r1, r3
12: 621a str r2, [r3, #32]
14: 6e8a ldr r2, [r1, #104] ; 0x68
16: 4b13 ldr r3, [pc, #76] ; (64 <SystemInit+0x64>)
18: 07d2 lsls r2, r2, #31
1a: d5fb bpl.n 14 <SystemInit+0x14>
1c: 4a14 ldr r2, [pc, #80] ; (70 <SystemInit+0x70>)
1e: 621a str r2, [r3, #32]
20: 461a mov r2, r3
22: 6e91 ldr r1, [r2, #104] ; 0x68
24: 4b0f ldr r3, [pc, #60] ; (64 <SystemInit+0x64>)
26: 03c8 lsls r0, r1, #15
28: d5fb bpl.n 22 <SystemInit+0x22>
2a: 4a12 ldr r2, [pc, #72] ; (74 <SystemInit+0x74>)
2c: 629a str r2, [r3, #40] ; 0x28
2e: 461a mov r2, r3
30: 6e91 ldr r1, [r2, #104] ; 0x68
32: 4b0c ldr r3, [pc, #48] ; (64 <SystemInit+0x64>)
34: 0789 lsls r1, r1, #30
36: d5fb bpl.n 30 <SystemInit+0x30>
38: 2202 movs r2, #2
3a: 631a str r2, [r3, #48] ; 0x30
3c: 6e9a ldr r2, [r3, #104] ; 0x68
3e: 4909 ldr r1, [pc, #36] ; (64 <SystemInit+0x64>)
40: 0712 lsls r2, r2, #28
42: d5fb bpl.n 3c <SystemInit+0x3c>
44: f44f 7000 mov.w r0, #512 ; 0x200
48: f06f 02ff mvn.w r2, #255 ; 0xff
4c: 2307 movs r3, #7
4e: 6008 str r0, [r1, #0]
50: 610a str r2, [r1, #16]
52: f8c1 3100 str.w r3, [r1, #256] ; 0x100
56: b662 cpsie i
58: 4b07 ldr r3, [pc, #28] ; (78 <SystemInit+0x78>)
5a: 4a08 ldr r2, [pc, #32] ; (7c <SystemInit+0x7c>)
5c: 601a str r2, [r3, #0]
5e: 4770 bx lr
60: 400e0a00 .word 0x400e0a00
64: 400e0400 .word 0x400e0400
68: 04000500 .word 0x04000500
6c: 0037ff09 .word 0x0037ff09
70: 0137ff09 .word 0x0137ff09
74: 20093f01 .word 0x20093f01
78: 00000000 .word 0x00000000
7c: 00b71b00 .word 0x00b71b00
Disassembly of section .text.SystemCoreClockUpdate:
00000000 <SystemCoreClockUpdate>:
0: 4834 ldr r0, [pc, #208] ; (d4 <SystemCoreClockUpdate+0xd4>)
2: 6b03 ldr r3, [r0, #48] ; 0x30
4: f003 0303 and.w r3, r3, #3
8: 2b01 cmp r3, #1
a: b410 push {r4}
c: d03e beq.n 8c <SystemCoreClockUpdate+0x8c>
e: d325 bcc.n 5c <SystemCoreClockUpdate+0x5c>
10: 6a03 ldr r3, [r0, #32]
12: 01d9 lsls r1, r3, #7
14: d54a bpl.n ac <SystemCoreClockUpdate+0xac>
16: 4930 ldr r1, [pc, #192] ; (d8 <SystemCoreClockUpdate+0xd8>)
18: 4a30 ldr r2, [pc, #192] ; (dc <SystemCoreClockUpdate+0xdc>)
1a: 600a str r2, [r1, #0]
1c: 482d ldr r0, [pc, #180] ; (d4 <SystemCoreClockUpdate+0xd4>)
1e: 6b03 ldr r3, [r0, #48] ; 0x30
20: f003 0303 and.w r3, r3, #3
24: 2b02 cmp r3, #2
26: bf0b itete eq
28: 6a84 ldreq r4, [r0, #40] ; 0x28
2a: 6ac4 ldrne r4, [r0, #44] ; 0x2c
2c: 6a83 ldreq r3, [r0, #40] ; 0x28
2e: 6ac3 ldrne r3, [r0, #44] ; 0x2c
30: f3c4 400a ubfx r0, r4, #16, #11
34: fb00 2202 mla r2, r0, r2, r2
38: 4826 ldr r0, [pc, #152] ; (d4 <SystemCoreClockUpdate+0xd4>)
3a: b2db uxtb r3, r3
3c: fbb2 f3f3 udiv r3, r2, r3
40: 600b str r3, [r1, #0]
42: 6b02 ldr r2, [r0, #48] ; 0x30
44: f002 0270 and.w r2, r2, #112 ; 0x70
48: 2a70 cmp r2, #112 ; 0x70
4a: d117 bne.n 7c <SystemCoreClockUpdate+0x7c>
4c: 4a24 ldr r2, [pc, #144] ; (e0 <SystemCoreClockUpdate+0xe0>)
4e: f85d 4b04 ldr.w r4, , #4
52: fba2 2303 umull r2, r3, r2, r3
56: 085b lsrs r3, r3, #1
58: 600b str r3, [r1, #0]
5a: 4770 bx lr
5c: 4b21 ldr r3, [pc, #132] ; (e4 <SystemCoreClockUpdate+0xe4>)
5e: 491e ldr r1, [pc, #120] ; (d8 <SystemCoreClockUpdate+0xd8>)
60: 695b ldr r3, [r3, #20]
62: 061a lsls r2, r3, #24
64: bf4c ite mi
66: f44f 4300 movmi.w r3, #32768 ; 0x8000
6a: f44f 43fa movpl.w r3, #32000 ; 0x7d00
6e: 600b str r3, [r1, #0]
70: 4818 ldr r0, [pc, #96] ; (d4 <SystemCoreClockUpdate+0xd4>)
72: 6b02 ldr r2, [r0, #48] ; 0x30
74: f002 0270 and.w r2, r2, #112 ; 0x70
78: 2a70 cmp r2, #112 ; 0x70
7a: d0e7 beq.n 4c <SystemCoreClockUpdate+0x4c>
7c: 6b02 ldr r2, [r0, #48] ; 0x30
7e: f85d 4b04 ldr.w r4, , #4
82: f3c2 1202 ubfx r2, r2, #4, #3
86: 40d3 lsrs r3, r2
88: 600b str r3, [r1, #0]
8a: 4770 bx lr
8c: 6a03 ldr r3, [r0, #32]
8e: 4912 ldr r1, [pc, #72] ; (d8 <SystemCoreClockUpdate+0xd8>)
90: 01db lsls r3, r3, #7
92: d408 bmi.n a6 <SystemCoreClockUpdate+0xa6>
94: 4b14 ldr r3, [pc, #80] ; (e8 <SystemCoreClockUpdate+0xe8>)
96: 600b str r3, [r1, #0]
98: 6a02 ldr r2, [r0, #32]
9a: f002 0270 and.w r2, r2, #112 ; 0x70
9e: 2a10 cmp r2, #16
a0: d014 beq.n cc <SystemCoreClockUpdate+0xcc>
a2: 2a20 cmp r2, #32
a4: d1e4 bne.n 70 <SystemCoreClockUpdate+0x70>
a6: 4b0d ldr r3, [pc, #52] ; (dc <SystemCoreClockUpdate+0xdc>)
a8: 600b str r3, [r1, #0]
aa: e7e1 b.n 70 <SystemCoreClockUpdate+0x70>
ac: 490a ldr r1, [pc, #40] ; (d8 <SystemCoreClockUpdate+0xd8>)
ae: 4a0e ldr r2, [pc, #56] ; (e8 <SystemCoreClockUpdate+0xe8>)
b0: 600a str r2, [r1, #0]
b2: 6a03 ldr r3, [r0, #32]
b4: f003 0370 and.w r3, r3, #112 ; 0x70
b8: 2b10 cmp r3, #16
ba: d004 beq.n c6 <SystemCoreClockUpdate+0xc6>
bc: 2b20 cmp r3, #32
be: d1ad bne.n 1c <SystemCoreClockUpdate+0x1c>
c0: 4a06 ldr r2, [pc, #24] ; (dc <SystemCoreClockUpdate+0xdc>)
c2: 600a str r2, [r1, #0]
c4: e7aa b.n 1c <SystemCoreClockUpdate+0x1c>
c6: 4a09 ldr r2, [pc, #36] ; (ec <SystemCoreClockUpdate+0xec>)
c8: 600a str r2, [r1, #0]
ca: e7a7 b.n 1c <SystemCoreClockUpdate+0x1c>
cc: 4b07 ldr r3, [pc, #28] ; (ec <SystemCoreClockUpdate+0xec>)
ce: 600b str r3, [r1, #0]
d0: e7ce b.n 70 <SystemCoreClockUpdate+0x70>
d2: bf00 nop
d4: 400e0400 .word 0x400e0400
d8: 00000000 .word 0x00000000
dc: 00b71b00 .word 0x00b71b00
e0: aaaaaaab .word 0xaaaaaaab
e4: 400e1410 .word 0x400e1410
e8: 003d0900 .word 0x003d0900
ec: 007a1200 .word 0x007a1200
Disassembly of section .text.system_init_flash:
00000000 <system_init_flash>:
0: 4b0f ldr r3, [pc, #60] ; (40 <system_init_flash+0x40>)
2: 4298 cmp r0, r3
4: d912 bls.n 2c <system_init_flash+0x2c>
6: 4b0f ldr r3, [pc, #60] ; (44 <system_init_flash+0x44>)
8: 4298 cmp r0, r3
a: d90b bls.n 24 <system_init_flash+0x24>
c: 4b0e ldr r3, [pc, #56] ; (48 <system_init_flash+0x48>)
e: 4298 cmp r0, r3
10: d911 bls.n 36 <system_init_flash+0x36>
12: 4b0e ldr r3, [pc, #56] ; (4c <system_init_flash+0x4c>)
14: 4298 cmp r0, r3
16: 4b0e ldr r3, [pc, #56] ; (50 <system_init_flash+0x50>)
18: bf8c ite hi
1a: 4a0e ldrhi r2, [pc, #56] ; (54 <system_init_flash+0x54>)
1c: f04f 2204 movls.w r2, #67109888 ; 0x4000400
20: 601a str r2, [r3, #0]
22: 4770 bx lr
24: 4b0a ldr r3, [pc, #40] ; (50 <system_init_flash+0x50>)
26: 4a0c ldr r2, [pc, #48] ; (58 <system_init_flash+0x58>)
28: 601a str r2, [r3, #0]
2a: 4770 bx lr
2c: 4b08 ldr r3, [pc, #32] ; (50 <system_init_flash+0x50>)
2e: f04f 6280 mov.w r2, #67108864 ; 0x4000000
32: 601a str r2, [r3, #0]
34: 4770 bx lr
36: 4b06 ldr r3, [pc, #24] ; (50 <system_init_flash+0x50>)
38: 4a08 ldr r2, [pc, #32] ; (5c <system_init_flash+0x5c>)
3a: 601a str r2, [r3, #0]
3c: 4770 bx lr
3e: bf00 nop
40: 01ba813f .word 0x01ba813f
44: 0375027f .word 0x0375027f
48: 053ec5ff .word 0x053ec5ff
4c: 07270dff .word 0x07270dff
50: 400e0a00 .word 0x400e0a00
54: 04000500 .word 0x04000500
58: 04000100 .word 0x04000100
5c: 04000200 .word 0x04000200
Here is output from compilation:
/usr/bin/arm-none-eabi-gcc -mthumb -mcpu=cortex-m4 -c -O2 -g2 -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -DDEBUG -DTOOLCHAIN_GCC_ARM -DNO_RELOC='0' -std=gnu99 -mlittle-endian -DSAM4S4C -I../../../ASF_CMSIS_Clean/branch/Release1.1/include/ -I. -I/usr/lib/gcc/arm-none-eabi/4.9.3/include/ -o system_sam4s.o system_sam4s.c /usr/bin/arm-none-eabi-gcc -mthumb -mcpu=cortex-m4 -c -O2 -g2 -fno-common - fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -DDEBUG -DTOOLCHAIN_GCC_ARM -DNO_RELOC='0' -std=gnu99 -mlittle-endian -DSAM4S4C -I../../../ASF_CMSIS_Clean/branch/Release1.1/include/ -I. -I/usr/lib/gcc/arm-none-eabi/4.9.3/include/ -o main.o main.c /usr/bin/arm-none-eabi-gcc -mthumb -mcpu=cortex-m4 -c -O2 -g2 -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -DDEBUG -DTOOLCHAIN_GCC_ARM -DNO_RELOC='0' -std=gnu99 -mlittle-endian -DSAM4S4C -I../../../ASF_CMSIS_Clean/branch/Release1.1/include/ -I. -I/usr/lib/gcc/arm-none-eabi/4.9.3/include/ -o proba.o proba.c /usr/bin/arm-none-eabi-gcc -mthumb -mcpu=cortex-m4 -Wl,--gc-sections -Wl,-Map=proba.map -T../../../ASF_CMSIS_Clean/branch/Release1.1/linker_scripts/flash_sam4s4.ld -L/usr/lib/gcc/arm-none-eabi/4.9.3/armv7e-m -o proba.elf system_sam4s.o main.o proba.o -lstdc++ -lsupc++ -lm -lc -lg -lnosys -lstdc++ -lsupc++ -lm -lc -lg -lnosys /usr/bin/arm-none-eabi-objcopy -O binary proba.elf proba.bin /usr/bin/arm-none-eabi-objcopy -Oihex proba.elf proba.hex
I added flags for debug and optimize but still can't get disassembly correctly. What i am doing wrong?
