SAML21 SysTick Clock Sources

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The datasheet doesn't seem to provide any information on using an external reference clock for the SysTick clock source in the SAML21 processor.  Can anybody provide clarity on how to use the external reference clock option in the control register for SysTick?  Does it work?  Which clock source does it use in this case?

 

According to the ARM spec, it would not allow me to clear the Clock Source control bit if it were not implemented.  However, I am able to clear and read back a bit value of 0, indicating that it accepted the configuration for an external reference source.  Unfortunately, I cannot find any information in the documentation (Microchip, Atmel, or ARM) about which clock source it uses as an external reference clock.

Last Edited: Wed. Mar 3, 2021 - 06:31 PM
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I did some testing to try to find out if the SysTick Clock Source control bit has any effect in the SAML21.  I found that no matter how this bit is configured, the SysTick timer is using GCLK0 as its source.  Changes to the Main Clock dividers have no effect on SysTick.  Changes to the GCLK Generator 0 divider DO have an effect.  And that effect is the same whether the Clock Source control bit is set or not.  Therefore, SysTick must be getting its clock from GCLK0 in any case. 

 

I did come across this note on a Microchip webpage: "Current SAM D21 errata indicate that the Reference Clock is un-implemented and that the user should configure the SysTick clock source to be the CPU Clock (CLKSOURCE==1). "  But in checking  the errata documents for both the SAMD21 and the SAML21 I didn't find this note.

 

Based on my experiment, the issue seems to exist with the SAML21 also.  It would be helpful if Microchip would update their documentation to provide these details.