Programming XDMA controller to use with External Bus Interface

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Recently I have acquired Atmel|Smart SAMA5D2 Xplained Ultra and I want to program XDMA controller to use with SMC (Static Memory Controller).

 

The problem is,

I don't know right configuration for XDMA control registers to configure XDMA controller for write to or read from external bus.

Standard XDMA configuration for DDR or internal SRAM doesn't work for external bus (for all chip selects CS0,CS1,CS2,CS3).

I can write to or read from external bus by CPU and by ICM (Integrity Check Monitor), but when I try to do these operations

by XDMAC0 or XDMAC1 the result is failure. I have 1 error in MATRIX1 (AHB Matrix H32MX) for Master0 (Bridge from H64MX)

when writing data by XDMAC0 or XDMAC1 (I use correct XDMA interface, IF0) and I have no errors when writing by CPU (CPU use

the same interface Master0). 

SAMA5D2 Datasheet describes connections between CPU, XDAMC0, XDMAC1, ICM from master's side and External Bus Interface

from slave's side.

 

Could someone help me to solve this problem?

2 passes in one word

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The problem was in security extensions of Matrix1 (where the slave EBI is located), external memory was secured against unsecured accesses.

You have to configure the security extensions (in Matrices) for slave memory space before using it by master controllers.

2 passes in one word

Last Edited: Fri. Oct 14, 2016 - 09:05 PM