I2C communication between STM32 and ATECC508a

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Gethu1106
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Posted by Gethu1106: Tue. Jan 14, 2020 - 12:10 PM
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Hi everyone. I'm working on a project to establish an I2C communication between STM32F030a and ATECC508a. I'm using the dev kit Cryptoauth Xplained Pro B. My problem is trying to wake up ATECC508a. The datasheet says that the SDA pin has to be held low for a period greater than twlo or a data byte 0x00 be transmitted at a lower clock rate. 

 

I'm using the below HAL library function 

HAL_I2C_Master_Transmit(&hi2c1, 0xC0<<1, 0x00, 1, 1000);

My clock rate is 100kHz and i tried 80 and 90 as well. But the device doesn't seem to wake up from the sleep mode and it always returns HAL_ERROR. Upon checking, I found that I'm always getting a NACK in every attempt. 

 

Can anyone help me in resolving this or am I doing it wrong. I'm fairly new so kindly help me.

Thanks!

Tags:

Security, General Security Discussions, STM32, ATECC508A
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david.prentice
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Posted by david.prentice: Tue. Jan 14, 2020 - 12:38 PM
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I can't be bothered to lookup the STM32 HAL docs.

The ATECC508A data sheet says that the I2C address is 0xC0.

 

Sure enough,  the datasheet does not specify whether 0xC0 is a 7-bit or 8-bit address.

I would guess that it is 8-bit.   If your HAL function expects 8-bit you would say:

 

HAL_I2C_Master_Transmit(&hi2c1, 0xC0 << 0, 0x00, 1, 1000);

Hey-ho.   It would make life so much easier if datasheets added ONE line to the summary e.g. 8-bit Slave address = 0xC0 or 7-bit Slave address = 0x60

 

David.

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Gethu1106
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Posted by Gethu1106: Tue. Jan 14, 2020 - 12:55 PM (Reply to #2)
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Thanks David. The HAL docs says that the target device address has to be shifted to left. I tried bot the possibilities considering it to 8-bit and 7-bit. But still no luck :(

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david.prentice
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Posted by david.prentice: Tue. Jan 14, 2020 - 01:24 PM
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Gethu1106 wrote:
The HAL docs says that the target device address has to be shifted to left.

That means that it expects the 7-bit value i.e. 0x60

 

4. General I/O Information
Communications to the ATECC508A are through one of two different protocols. The protocols are
selected by specifying the part number that is ordered:
• Single-Wire Interface: Uses a single GPIO connection on the system microprocessor that is
connected to the SDA pin on the device. It permits the fewest number of pins connected to any
removable or replaceable entity. The bit rate is up to 26Kb/s.
• I2C Interface: This mode is compatible with the I2C standard and also with the Microchip AT24C16
Serial EEPROM interface. Two pins, Serial Data (SDA) and Serial Clock (SCL), are required. The
I2C interface supports a bit rate of up to 1Mb/s.
Note: The ATECC508A and AT24C16B have different default I2C addresses. The ATECC508A
I2C address can be modified from default by writing a new value into the configuration zone.
The lowest levels of the I/O protocols are described below. Above the I/O protocol level, exactly the same
bytes are transferred to and from the device to implement the security commands and error codes, which
are documented in section Security Commands.
Note: The device implements a fail-safe internal watchdog timer that forces it into a very low power
mode after a certain time interval regardless of any current activity. System programming must take this
into consideration. See section Watchdog Failsafe.

The AT24C16B has 7-bit address 0x50.  (0x50 - 0x57 with A0-A2 pins)

 

It is easy enough to debug the I2C bus.    Just connect a Logic Analyser.

Does your STM32F030a  support Arduino ?

 

David.

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