DMA documentation for the system bus interface configuration for SIF/DIF

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#1
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Hello,

 

I'm working with a E70 device. In the DMA channel configuration register there are two bits called SIF and DIF. They belong to the source/destination of the DMA transfer concerning the system bus (0 or 1). Unfortunately I could not find something in the datasheet that tells me which components are connected to the system bus 0 or 1. Can someone give me a hint where I can find the corresponding information?

 

Best Regards

Markus

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Yes, I would also like to know. WOuld be nice if Atmel could get a response together...

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have a look at the datasheet -> 18. matrix -> 18.2.3 master to slave access (master 4 and 5)

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First of all: Thanks E70tryhard for the hint!

But WOW, this is really far fetched. How is one supposed to find that information? The term "system bus interface" is used exclusively in the chapter about the XDMAC - and nowhere else in the whole datasheet. Honestly, this datasheet is very sloppily written and needs urgent enhancment.

I always put informative Sticky Notes in my PDFs, about issues like this. And since I suppose I am not the only one doing this, why not proposing to Atmel to open an account where we could share our Sticky Notes? Like this they would not to have to make costly updates (which they don't anyway) and we could all profit from vastly amended datasheets. No?! Does anyone know anyone at Atmel to which this could be proposed?