Ateml WPIR SAM4S ref design Camera to external SRAM data path

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In the current design for WPIR SAM4S ref design, a 55nm access speed SRAM is used. i would like to redesignt the board to have a bigger display. it need a high speed SRAM due to increase in the number of pixels. i have managed to increase the SMC speed, but still i can see the incoming data from the camera is not fast enough. 

Can any one help me to understand the data path from camera to external memory. 

as per my understanding, 

Camera --> GPIO --> GPIO PDC --> SMC --> SRAM

is there any setting in GPIO PDC to match with the SRAM speed?






Last Edited: Mon. Nov 21, 2016 - 08:05 PM