Fastest external oscillator for SAMD21

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MFS
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Posted by MFS: Thu. Feb 11, 2021 - 11:41 PM
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I'd like to use an external I/O pin as a source for one of the generic clocks on the SAMD21 (Arduino Nano 33 IoT), but can't find the maximum allowed frequency in the datasheet.  I've got GCLK_IO selected as the source for the generic clock generator4 (connected to the 32-bit timer/counter) with a 40 MHz TCXO driving the pin.  When I check the clock count in 1 second intervals, it has only counted about 10 million counts, and varies quite a bit, leading me to believe that it can't handle 40 MHz when using the GCLK_IO as an input.

 

The datasheet (https://ww1.microchip.com/downlo...) on page 876 lists the max rise and fall time for a GPIO pin at 15nS.  So 30nS per cycle = about 33 MHz.

And page 866/867 lists the maximum frequency for the GCLK generator at 48 MHz, but doesn't specifically list the limits when running with GCLK_IO (external pin) as a source.

 

10 MHz would be fast enough for my project, but I'd like to know what the actual pin/generator/clock is rated to run at before ordering more parts!  Does anyone know what the limiting factor would be when driving the clock/counter via an external oscillator?

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Tools, Evaluation and Development Kits (ARM-related)
Last Edited: Fri. Feb 12, 2021 - 10:19 AM
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Adithya Yuri
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Posted by Adithya Yuri: Sat. Mar 6, 2021 - 04:41 AM
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Max Frequency you can feed to XIN pin with external clock is mentioned in datasheet.

 

 

 

Max crystal frequency is also mentioned in the datasheet.

 

 

So basically 32MHz seems to be the max clock.

 

Look at electrical characteristics section for more info.

Last Edited: Sat. Mar 6, 2021 - 04:42 AM
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MFS
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Posted by MFS: Sun. Mar 7, 2021 - 09:18 PM
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Thanks for looking for that info!  However, I saw that same note in the datasheet when trying to find the limits earlier.  From what I understand, that is listing the maximum frequency when the clock is applied to the XIN pin, which is the pin dedicated to a Crystal Input.  I'm trying to drive one of the "generic clocks" using the GCLK_IO setting, which drives it from a GPIO pin.  I couldn't find that limit (of a GPIO pin, vs. the XIN pin) specifically listed in the datasheet.

 

The closest thing I could find anywhere was this obscure note from Microchip, which implies that the max frequency that can be applied to GPIO pins might be 12 MHz:

 

https://microchipsupport.force.c...

 

When I drove the counter (through the generic clock using GCLK_IO through an IO pin) using a 25 MHz TCXO, the counter would only see between 10-13 million counts per second, instead of 25 million, so I don't think the 32 MHz limit applies to all of the GPIO pins.

 

Based on all of that, I ordered some 10 MHz TCXOs and am now driving the counter using that.  This seems to work perfectly, lending more evidence that the limit is somewhere between 10 and 25 MHz (probably the 12 MHz implied in the link from Microchip).

 

Thanks again for looking at this....

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Adithya Yuri
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Posted by Adithya Yuri: Mon. Mar 8, 2021 - 10:15 AM
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Datasheet mentions that the GCLK frequencies can be upto 48 or 96 MHz. But this number applies to the clocks running inside the device.

 

Even if the GCLKs can take upto 48MHz through GPIO GCLK_IN, the problem would be the capacitance on the pin. The GPIOs are not designed to handle such frequencies, that is why I suggested the XOSC pins, they are better suited to do this.

 

All microcontrollers have what is called a IBIS file(usually not disclosed to outside world), this file contains the electrical characteristics of the pin itself(modeled information). If you have access to this file then you can get the pin capacitance.

 

Pin capacitance is the issue here, if you put a high frequency signal across a high capacitance load, the signal would be attenuated. Some might get picked up by the pin and rest might be ignored. You can even verify this with an oscilloscope, check if your signals meet CMOS levels.

 

You can ask Microchip technical support for this information, I am sure they will help you out. 

Last Edited: Mon. Mar 8, 2021 - 10:16 AM
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Bronze Markawneil
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Posted by awneil: Mon. Mar 8, 2021 - 11:33 AM
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Adithya Yuri wrote:
Pin capacitance is the issue here

Indeed.

 

There may also be other things in the GPIO function - such as de-glitching, synchronisation, etc.

Quite possibly, when used as a clock input, the XOSC pin may bypass these?

Also, being specifically designed for this function, it may be "special".

 

Are there any clues to be gained from timer specs when clocked from a port pin ... ?

 

Adithya Yuri wrote:
You can ask Microchip technical support

+1

 

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