AVR Freaks

Thanks David. Amateur mistake from my side. If i understand you correctly the OR= operation causes a read from a write only register. I have changed the code by deleting the OR operation. I also change the MULB to 15 and the RC oscillator to 8MHz so i get a 120MHz clk frequency. Measuring the PIO with my logic analyser i am getting 25MHz. Which seams reasonable? Im assuming there are a few CPU CLK cycles used to set registers.

Thanks for the headsup on being careful with the M4. Could you possible elaborate on this? I am being very careful in terms of static. Not too sure what you mean.

/*
 * ATSAM4S_BARE_1.c
 *
 * Created: 4/24/2020 2:54:59 PM
 * Author : Atticus
 */ 


#include "sam.h"

//delay function
void delay (void){
	for (volatile uint16_t x=0; x<65535;x++){
		asm ("nop");
	}
}


void set_pin_toggle(void){
	
	

	REG_CKGR_MOR |= (CKGR_MOR_KEY_PASSWD) | (CKGR_MOR_MOSCRCF_8_MHz);
	
	//enable the periferal clock for PIOC
	REG_PMC_PCER0 |= (PMC_PCDR0_PID13);
	
	//set the multiplyer and divider
	//Here i cannot go more than 6????
	REG_CKGR_PLLBR |= CKGR_PLLBR_MULB(15) | CKGR_PLLBR_DIVB(1);
	
	//select PLLB as the master clock
	REG_PMC_MCKR |= PMC_MCKR_CSS_PLLB_CLK;
	
	//enable PIOC controller for pin 30
	REG_PIOC_PER |= PIO_PER_P30;
	
	//set as output
	REG_PIOC_OER |= PIO_PER_P30;
	
}



int main(void)
{
    /* Initialize the SAM system */
    SystemInit();
	set_pin_toggle();
	

	
	while (1) 
    {
		
		//Set Output Data Register
		REG_PIOC_SODR = PIO_PER_P30;
		
		//clear Output Data Register
		REG_PIOC_CODR = PIO_PER_P30;

    }
}