64bit or 32 bit free running timer with capture match setup

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Hello,

I am using Atmel start, and are not sure if that was the right decision, but the decision is taken:)

I am trying to make a simple counter to count sysclk tick which roll over on 2^64. I want to count precise the amount of such ticks between lets say two 1PPS pulses.

I have done this with an MEGA256 but does not figure out how to do this on an ATSAML21J18. I am able to do such functionality with systick, unfortunately this one is 24bit and with a clk on 16.384Mhz i will ran into an rollover if the 1PPS is not precises since 24bits gives us 2^24 = 16777216 . Any example or solution on how to do this.

 

Br Leif G

Br Leif G

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I've written a program for a SAMD21G on a Sparkfun breakout board which uses a 4MHz XOSC (divided down to 1MHz) as clock for TCC1. The PPS generates an event, the user is TCC1 MC0. This captures the current TCC1 value. It is also possible to capture the period and pulse width directly, but I wanted to use CC1 for something else. The event activity ISR picks up the captured CC0 value.

You wanted to use a 32-bit TC, but you can't capture TC values, so the measured value depends on interrupt response times. You can also use the 24-bit counter to count the 16.384MHz clock. If the first value F is greater than the second value S  the counter rolled over, and the interval is 0x01000000 - F + S (for a 24-bit counter), otherwise S-F. All numbers are uint32_t

The DFLL frequency isn't constant, I measured about 5ppm RMS

Jerry